Data Structures | |
struct | TIS_PC_REGISTERS |
Defines | |
#define | TPM_BASE_ADDRESS 0xfed40000 |
#define | TCG_PLATFORM_TYPE_CLIENT 0 |
#define | TCG_PLATFORM_TYPE_SERVER 1 |
#define | TIS_PC_VALID BIT7 |
#define | TIS_PC_ACC_ACTIVE BIT5 |
#define | TIS_PC_ACC_SEIZED BIT4 |
#define | TIS_PC_ACC_SEIZE BIT3 |
#define | TIS_PC_ACC_PENDIND BIT2 |
#define | TIS_PC_ACC_RQUUSE BIT1 |
#define | TIS_PC_ACC_ESTABLISH BIT0 |
#define | TIS_PC_STS_READY BIT6 |
#define | TIS_PC_STS_GO BIT5 |
#define | TIS_PC_STS_DATA BIT4 |
#define | TIS_PC_STS_EXPECT BIT3 |
#define | TIS_PC_STS_RETRY BIT1 |
#define | TIS_TIMEOUT_A 750 * 1000 |
#define | TIS_TIMEOUT_B 2000 * 1000 |
#define | TIS_TIMEOUT_C 750 * 1000 |
#define | TIS_TIMEOUT_D 750 * 1000 |
#define | TPMCMDBUFLENGTH 1024 |
Typedefs | |
typedef EFI_HANDLE | TIS_TPM_HANDLE |
typedef TIS_PC_REGISTERS * | TIS_PC_REGISTERS_PTR |
Functions | |
EFI_STATUS EFIAPI | TisPcWaitRegisterBits (IN UINT8 *Register, IN UINT8 BitSet, IN UINT8 BitClear, IN UINT32 TimeOut) |
EFI_STATUS EFIAPI | TisPcReadBurstCount (IN TIS_PC_REGISTERS_PTR TisReg, OUT UINT16 *BurstCount) |
EFI_STATUS EFIAPI | TisPcPrepareCommand (IN TIS_PC_REGISTERS_PTR TisReg) |
EFI_STATUS EFIAPI | TisPcRequestUseTpm (IN TIS_PC_REGISTERS_PTR TisReg) |
EFI_STATUS EFIAPI | TpmCommHashAll (IN CONST UINT8 *Data, IN UINTN DataLen, OUT TPM_DIGEST *Digest) |
Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#define TCG_PLATFORM_TYPE_CLIENT 0 |
Referenced by InstallAcpiTable(), SetupEventLog(), TcgDxeLogEventI(), and TcgDxeStatusCheck().
#define TCG_PLATFORM_TYPE_SERVER 1 |
Referenced by MeasureHandoffTables().
#define TIS_PC_ACC_ACTIVE BIT5 |
Indicate that this locality is active.
Referenced by TisPcRequestUseTpm(), and Tpm12TisPcRequestUseTpm().
#define TIS_PC_ACC_ESTABLISH BIT0 |
A value of 1 indicates that a T/OS has not been established on the platform
#define TIS_PC_ACC_PENDIND BIT2 |
When this bit is 1, another locality is requesting usage of the TPM.
#define TIS_PC_ACC_RQUUSE BIT1 |
Set to 1 to indicate that this locality is requesting to use TPM.
Referenced by TisPcRequestUseTpm(), and Tpm12TisPcRequestUseTpm().
#define TIS_PC_ACC_SEIZE BIT3 |
Set to 1 to indicate that TPM MUST reset the TIS_PC_ACC_ACTIVE bit and remove ownership for localities less than the locality that is writing this bit.
#define TIS_PC_ACC_SEIZED BIT4 |
Set to 1 to indicate that this locality had the TPM taken away while this locality had the TIS_PC_ACC_ACTIVE bit set.
#define TIS_PC_STS_DATA BIT4 |
This bit indicates that the TPM has data available as a response.
Referenced by TisPcReceive(), TisTpmCommand(), and Tpm12TisTpmCommand().
#define TIS_PC_STS_EXPECT BIT3 |
The TPM sets this bit to a value of 1 when it expects another byte of data for a command.
Referenced by TisPcSend(), TisTpmCommand(), and Tpm12TisTpmCommand().
#define TIS_PC_STS_GO BIT5 |
Write a 1 to this bit to cause the TPM to execute that command.
Referenced by TisPcExecute(), TisTpmCommand(), and Tpm12TisTpmCommand().
#define TIS_PC_STS_READY BIT6 |
When this bit is 1, TPM is in the Ready state, indicating it is ready to receive a new command.
Referenced by TisPcExecute(), TisPcPrepareCommand(), TisTpmCommand(), Tpm12TisPcPrepareCommand(), and Tpm12TisTpmCommand().
#define TIS_PC_STS_RETRY BIT1 |
Writes a 1 to this bit to force the TPM to re-send the response.
#define TIS_PC_VALID BIT7 |
This bit is a 1 to indicate that the other bits in this register are valid.
Referenced by TisPcReceive(), TisPcRequestUseTpm(), TisPcSend(), TisTpmCommand(), Tpm12TisPcRequestUseTpm(), and Tpm12TisTpmCommand().
#define TIS_TIMEOUT_A 750 * 1000 |
Referenced by TisPcRequestUseTpm(), and Tpm12TisPcRequestUseTpm().
#define TIS_TIMEOUT_B 2000 * 1000 |
Referenced by TisPcPrepareCommand(), TisPcReceive(), TisTpmCommand(), Tpm12TisPcPrepareCommand(), and Tpm12TisTpmCommand().
#define TIS_TIMEOUT_C 750 * 1000 |
Referenced by TisPcSend(), TisTpmCommand(), and Tpm12TisTpmCommand().
#define TIS_TIMEOUT_D 750 * 1000 |
Referenced by TisPcReadBurstCount(), and Tpm12TisPcReadBurstCount().
#define TPM_BASE_ADDRESS 0xfed40000 |
TPM register base address.
Referenced by DriverEntry(), MeasureFvImage(), PeimEntryMA(), PeimEntryMP(), PhysicalPresencePpiNotifyCallback(), and TcgConfigDriverEntryPoint().
#define TPMCMDBUFLENGTH 1024 |
Referenced by TisPcExecute(), TisPcReceive(), TisPcReceiveV(), and TisPcSendV().
typedef TIS_PC_REGISTERS* TIS_PC_REGISTERS_PTR |
typedef EFI_HANDLE TIS_TPM_HANDLE |
EFI_STATUS EFIAPI TisPcPrepareCommand | ( | IN TIS_PC_REGISTERS_PTR | TisReg | ) |
Set TPM chip to ready state by sending ready command TIS_PC_STS_READY to Status Register in time.
[in] | TisReg | Pointer to TIS register. |
EFI_SUCCESS | TPM chip enters into ready state. | |
EFI_INVALID_PARAMETER | TisReg is NULL. | |
EFI_TIMEOUT | TPM chip can't be set to ready state in time. |
References EFI_STATUS(), TIS_PC_STS_READY, TIS_TIMEOUT_B, TisPcWaitRegisterBits(), and UINTN().
Referenced by TisPcSend(), and TisTpmCommand().
EFI_STATUS EFIAPI TisPcReadBurstCount | ( | IN TIS_PC_REGISTERS_PTR | TisReg, | |
OUT UINT16 * | BurstCount | |||
) |
Get BurstCount by reading the burstCount field of a TIS regiger in the time of default TIS_TIMEOUT_D.
[in] | TisReg | Pointer to TIS register. |
[out] | BurstCount | Pointer to a buffer to store the got BurstConut. |
EFI_SUCCESS | Get BurstCount. | |
EFI_INVALID_PARAMETER | TisReg is NULL or BurstCount is NULL. | |
EFI_TIMEOUT | BurstCount can't be got in time. |
References TIS_TIMEOUT_D, and UINTN().
Referenced by TisPcReceive(), TisPcSend(), and TisTpmCommand().
EFI_STATUS EFIAPI TisPcRequestUseTpm | ( | IN TIS_PC_REGISTERS_PTR | TisReg | ) |
Get the control of TPM chip by sending requestUse command TIS_PC_ACC_RQUUSE to ACCESS Register in the time of default TIS_TIMEOUT_D.
[in] | TisReg | Pointer to TIS register. |
EFI_SUCCESS | Get the control of TPM chip. | |
EFI_INVALID_PARAMETER | TisReg is NULL. | |
EFI_NOT_FOUND | TPM chip doesn't exit. | |
EFI_TIMEOUT | Can't get the TPM control in time. |
[in] | TisReg | Pointer to TIS register. |
EFI_SUCCESS | Get the control of TPM chip. | |
EFI_INVALID_PARAMETER | TisReg is NULL. | |
EFI_NOT_FOUND | TPM chip doesn't exit. | |
EFI_TIMEOUT | Can't get the TPM control in time. |
References EFI_STATUS(), TIS_PC_ACC_ACTIVE, TIS_PC_ACC_RQUUSE, TIS_PC_VALID, TIS_TIMEOUT_A, TisPcPresenceCheck(), TisPcWaitRegisterBits(), and UINTN().
Referenced by DriverEntry(), DTpm2RequestUseTpm(), PeimEntryMA(), PeimEntryMP(), and TcgConfigDriverEntryPoint().
EFI_STATUS EFIAPI TisPcWaitRegisterBits | ( | IN UINT8 * | Register, | |
IN UINT8 | BitSet, | |||
IN UINT8 | BitClear, | |||
IN UINT32 | TimeOut | |||
) |
Check whether the value of a TPM chip register satisfies the input BIT setting.
[in] | Register | Address port of register to be checked. |
[in] | BitSet | Check these data bits are set. |
[in] | BitClear | Check these data bits are clear. |
[in] | TimeOut | The max wait time (unit MicroSecond) when checking register. |
EFI_SUCCESS | The register satisfies the check bit. | |
EFI_TIMEOUT | The register can't run into the expected status in time. |
References UINTN().
Referenced by TisPcPrepareCommand(), TisPcReceive(), TisPcRequestUseTpm(), TisPcSend(), and TisTpmCommand().
EFI_STATUS EFIAPI TpmCommHashAll | ( | IN CONST UINT8 * | Data, | |
IN UINTN | DataLen, | |||
OUT TPM_DIGEST * | Digest | |||
) |
Single function calculates SHA1 digest value for all raw data. It combines Sha1Init(), Sha1Update() and Sha1Final().
[in] | Data | Raw data to be digested. |
[in] | DataLen | Size of the raw data. |
[out] | Digest | Pointer to a buffer that stores the final digest. |
EFI_SUCCESS | Always successfully calculate the final digest. |
References UINTN().
Referenced by HashLogExtendEvent(), TcgDxeHashAll(), and TcgDxeHashLogExtendEventI().